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77fd0ce4cf
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towards 0.10
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2023-08-22 00:27:27 +02:00 |
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08d447115d
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towards 0.10.1
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2023-08-06 15:38:23 +02:00 |
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22f05324fa
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zig: 0.5.0 -> 0.5.0+e6a812c82
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2020-02-02 18:24:48 +01:00 |
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ad329b5f81
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Step 11: Preemptive scheduler
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2019-12-27 11:02:29 +01:00 |
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9ec23055bc
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Step 7+8+9: usleep(), DeltaQueue
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2019-12-15 19:38:37 +01:00 |
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ed5b97a87b
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commit before starting Brendan's multitasking tutorial
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2019-11-29 21:24:32 +01:00 |
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5880d5296e
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cleaning up before kmalloc
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2019-11-23 20:40:38 +01:00 |
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902aa136c6
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PIT configured, preparing for scheduling
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2019-09-14 15:49:57 +02:00 |
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bdc3b2939b
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compiles now, new import architecture
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2019-08-22 21:59:23 +02:00 |
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28175d9336
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refactor namespacing for readability
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2019-08-18 23:47:37 +02:00 |
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d051e1b0c8
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added virtio, refactoring untill compiler is fixed
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2019-08-18 23:16:52 +02:00 |
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e832dede16
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paging almost done, endianess problem for now
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2019-08-13 22:37:05 +02:00 |
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f3285163e3
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multiboot is fixed but using multiboot v1 for now, should work fine, memory paging next
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2019-06-25 22:35:52 +02:00 |
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14ff4db74a
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first commit
boot ok
vga ok
console soon
interrupt mapping ok
isr triggers ok but doesn't iret
still lots to port from rust
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2019-05-11 01:11:34 +02:00 |
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